I have been working on embedded computer vision using the Mojo FPGA development board. So far, after getting to grips with the principles of FPGAs and Verilog I've built 1D image filter buffers that act in orthogonal directions. I've used these to implement de-noising median and gaussian filters and image intensity normalisation as part of an image processing pipeline. Because this is implemented on a FPGA as a processing pipeline it works at the frame-rate of the camera, which in my case is 15fps.
I am now finishing a 2D image filter buffer which I'm aiming to use to implement an adapted version of the FAST feature point detector and a cascading multi-scale series of 2D image filter buffers.
See my Projects page for more details.